Reconfigurable silicon nanowire transistors

Nano Lett. 2012 Jan 11;12(1):119-24. doi: 10.1021/nl203094h. Epub 2011 Dec 1.

Abstract

Over the past 30 years electronic applications have been dominated by complementary metal oxide semiconductor (CMOS) devices. These combine p- and n-type field effect transistors (FETs) to reduce static power consumption. However, CMOS transistors are limited to static electrical functions, i.e., electrical characteristics that cannot be changed. Here we present the concept and a demonstrator of a universal transistor that can be reversely configured as p-FET or n-FET simply by the application of an electric signal. This concept is enabled by employing an axial nanowire heterostructure (metal/intrinsic-silicon/metal) with independent gating of the Schottky junctions. In contrast to conventional FETs, charge carrier polarity and concentration are determined by selective and sensitive control of charge carrier injections at each Schottky junction, explicitly avoiding the use of dopants as shown by measurements and calculations. Besides the additional functionality, the fabricated nanoscale devices exhibit enhanced electrical characteristics, e.g., record on/off ratio of up to 1 × 10(9) for Schottky transistors. This novel nanotransistor technology makes way for a simple and compact hardware platform that can be flexibly reconfigured during operation to perform different logic computations yielding unprecedented circuit design flexibility.

Publication types

  • Research Support, Non-U.S. Gov't

MeSH terms

  • Crystallization / methods*
  • Equipment Design
  • Equipment Failure Analysis
  • Nanostructures / chemistry*
  • Nanostructures / ultrastructure*
  • Nanotechnology / instrumentation*
  • Particle Size
  • Silicon / chemistry*
  • Transistors, Electronic*

Substances

  • Silicon