Few electron limit of n-type metal oxide semiconductor single electron transistors

Nanotechnology. 2012 Jun 1;23(21):215204. doi: 10.1088/0957-4484/23/21/215204.


We report the electronic transport on n-type silicon single electron transistors (SETs) fabricated in complementary metal oxide semiconductor (CMOS) technology. The n-type metal oxide silicon SETs (n-MOSSETs) are built within a pre-industrial fully depleted silicon on insulator (FDSOI) technology with a silicon thickness down to 10 nm on 200 mm wafers. The nominal channel size of 20 × 20 nm(2) is obtained by employing electron beam lithography for active and gate level patterning. The Coulomb blockade stability diagram is precisely resolved at 4.2 K and it exhibits large addition energies of tens of meV. The confinement of the electrons in the quantum dot has been modeled by using a current spin density functional theory (CS-DFT) method. CMOS technology enables massive production of SETs for ultimate nanoelectronic and quantum variable based devices.

Publication types

  • Research Support, Non-U.S. Gov't

MeSH terms

  • Electron Transport
  • Equipment Design
  • Equipment Failure Analysis
  • Metals / chemistry*
  • Nanostructures / chemistry*
  • Nanostructures / ultrastructure
  • Nanotechnology / instrumentation*
  • Particle Size
  • Semiconductors*
  • Silicon / chemistry*
  • Transistors, Electronic*


  • Metals
  • Silicon