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, 13 (4), 4624-39

A Wireless and Batteryless Microsystem With Implantable Grid electrode/3-dimensional Probe Array for ECoG and Extracellular Neural Recording in Rats

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A Wireless and Batteryless Microsystem With Implantable Grid electrode/3-dimensional Probe Array for ECoG and Extracellular Neural Recording in Rats

Chih-Wei Chang et al. Sensors (Basel).

Abstract

This paper presents the design and implementation of an integrated wireless microsystem platform that provides the possibility to support versatile implantable neural sensing devices in free laboratory rats. Inductive coupled coils with low dropout regulator design allows true long-term recording without limitation of battery capacity. A 16-channel analog front end chip located on the headstage is designed for high channel account neural signal conditioning with low current consumption and noise. Two types of implantable electrodes including grid electrode and 3D probe array are also presented for brain surface recording and 3D biopotential acquisition in the implanted target volume of tissue. The overall system consumes less than 20 mA with small form factor, 3.9 × 3.9 cm2 mainboard and 1.8 × 3.4 cm2 headstage, is packaged into a backpack for rats. Practical in vivo recordings including auditory response, brain resection tissue and PZT-induced seizures recording demonstrate the correct function of the proposed microsystem. Presented achievements addressed the aforementioned properties by combining MEMS neural sensors, low-power circuit designs and commercial chips into system-level integration.

Figures

Figure 1.
Figure 1.
System structure of the presented microsystem.
Figure 2.
Figure 2.
Three dimensional neural probe array. (A) Stacking method (B,C) Close view of the electrode site and shafts (D) Wire bonding from each level of the array (E) Assembled array on one cent coin.
Figure 3.
Figure 3.
Flexible grid electrode array (A) Fabrication process. (B) Close-up view of the sensing electrodes. (C) Packaging and connection by a connector to the printed circuit board.
Figure 4.
Figure 4.
(A) Block diagram of the LDO regulator (B) Schematic of error amplifier (C) Microphotograph of the fabricated LDO regulator chip.
Figure 5.
Figure 5.
(A) Block diagram of the 16-channel amplifier, (B) Schematic of the differential difference amplifier, (C) Microphotograph of fabricated neural amplifier chip.
Figure 6.
Figure 6.
Fabricated microsystem including headstage and main board.
Figure 7.
Figure 7.
(A) Control flow of the MCU (B) Data timing and packaging method.
Figure 8.
Figure 8.
(A) Impedance spectrum (B) Temperature raise of regulators (C) Tunable Gain/Band (D) PSRR performance of the LDO regulator.
Figure 9.
Figure 9.
(A,B) Optical photograph of the grid electrode implantation (C) Time-magnitude plot of the averaged ECoG response under 9 kHz 75 dB SPL stimulation.
Figure 10.
Figure 10.
3D distributed near-field potential recording by 3D probe array from cerebral resection cortex tissue.
Figure 11.
Figure 11.
Induced seizures recording on rat by the present microsystem.
Figure 12.
Figure 12.
Recorded spike-wave (SWD) discharge distributions from frontal to parietal (A) Time domain plot (B) Frequency domain plot. Red dotted rectangle denotes the SWD part founded in the recording.

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