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Towards Ultra-Thin Plasmonic Silicon Wafer Solar Cells With Minimized Efficiency Loss

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Towards Ultra-Thin Plasmonic Silicon Wafer Solar Cells With Minimized Efficiency Loss

Yinan Zhang et al. Sci Rep.

Abstract

The cost-effectiveness of market-dominating silicon wafer solar cells plays a key role in determining the competiveness of solar energy with other exhaustible energy sources. Reducing the silicon wafer thickness at a minimized efficiency loss represents a mainstream trend in increasing the cost-effectiveness of wafer-based solar cells. In this paper we demonstrate that, using the advanced light trapping strategy with a properly designed nanoparticle architecture, the wafer thickness can be dramatically reduced to only around 1/10 of the current thickness (180 μm) without any solar cell efficiency loss at 18.2%. Nanoparticle integrated ultra-thin solar cells with only 3% of the current wafer thickness can potentially achieve 15.3% efficiency combining the absorption enhancement with the benefit of thinner wafer induced open circuit voltage increase. This represents a 97% material saving with only 15% relative efficiency loss. These results demonstrate the feasibility and prospect of achieving high-efficiency ultra-thin silicon wafer cells with plasmonic light trapping.

Figures

Figure 1
Figure 1. Concept of plasmonics nanoparticle (NP) enabled ultra-thin high-efficiency Si wafer solar cells.
(a) A standard 180 μm solar cell, consisting of a 75 nm SiNx antireflection coating (ARC) layer, the Si layer and the Al back reflector. Ultra-thin solar cell with (b) the spherical NPs located on the front surface of the SiNx ARC and (c) the hemispherical NPs embedded in a SiO2 layer between the Si layer and the Al back reflector.
Figure 2
Figure 2. Optical simulations by FDTD.
(a) Integrated light absorption in the Si layers of the plasmonic solar cell designs referenced to the standard solar cells as a function of the wafer thickness. The horizontal dash line shows the integrated absorption for a 180 μm standard wafer cell. (b) Light absorption spectrum in Si for 50 μm wafer cells with the optimized rear Ag NPs, referenced to the standard 180 μm and 50 μm wafer cells. (c) Integrated absorption enhancement at each wafer thickness for the optimized front Al, Ag NPs and the optimized rear Ag NPs, respectively. (d) Light absorption spectrum in Si for the 180 μm wafer cells in the cases of standard structure, front Al NPs and rear Ag NPs. The oscillations in the longer wavelengths are due to the interference effect in the simulation.
Figure 3
Figure 3. Normalized scattering cross-sections of the NPs.
(a) The front surface located spherical Al NPs with diameters D = 120 nm and 220 nm and Ag NPs with diameters D = 100 nm and 240 nm, and (b) the hemispherical Ag NPs embedded in the SiO2 with diameters D = 160 nm, 200 nm and 240 nm.
Figure 4
Figure 4. Optical experiments of the ultra-thin wafers.
(a) Measured reflectance of the 50 μm Si wafers with the standard light trapping structures (75 nm SiNx ARC and Al back reflector) and the rear Ag NP light trapping, with the inset image showing the self-assembly Ag NPs (scale bar: 1 μm) (b) Absorption enhancement spectrum of the ultra-thin wafers from 50 μm to 2 μm, with the inset image showing the electrical profile at 800 nm for the 2 μm Si wafer with optimized square array of rear located Ag NPs (c) Reflectance of the two reflectors: standard reflector and the plasmonic reflector, with glass slide as superstrate for measurement (d) Experimental integrated absorption of the rear plasmonic solar cells and the standard cells, excluding the particle induced losses, in comparison with the FDTD modelling.
Figure 5
Figure 5. Electric performance evaluations of the plasmonic wafer cells.
(a) The Voc and Jsc of the rear plasmonic enhanced wafer cells as a function of the wafer thickness. The dash line shows the Jsc of the 180 μm standard wafer cells for reference. (b) The Eff of the rear plasmonic enhanced cells, referenced to the standard cells. The normalized efficiency (to the 180 μm standard wafer cells) is shown in the right axis.

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