High-Mobility Holes in Dual-Gated WSe2 Field-Effect Transistors

ACS Nano. 2015 Oct 27;9(10):10402-10. doi: 10.1021/acsnano.5b04611. Epub 2015 Sep 14.


We demonstrate dual-gated p-type field-effect transistors (FETs) based on few-layer tungsten diselenide (WSe2) using high work-function platinum source/drain contacts and a hexagonal boron nitride top-gate dielectric. A device topology with contacts underneath the WSe2 results in p-FETs with ION/IOFF ratios exceeding 10(7) and contacts that remain ohmic down to cryogenic temperatures. The output characteristics show current saturation and gate tunable negative differential resistance. The devices show intrinsic hole mobilities around 140 cm(2)/(V s) at room temperature and approaching 4000 cm(2)/(V s) at 2 K. Temperature-dependent transport measurements show a metal-insulator transition, with an insulating phase at low densities and a metallic phase at high densities. The mobility shows a strong temperature dependence consistent with phonon scattering, and saturates at low temperatures, possibly limited by Coulomb scattering or defects.

Keywords: field-effect transistor (FET); hole mobility; metal−insulator transition (MIT); transition metal dichalcogenide (TMD); tungsten diselenide (WSe2).

Publication types

  • Research Support, Non-U.S. Gov't
  • Research Support, U.S. Gov't, Non-P.H.S.