We introduce cracked film lithography (CFL) as a way to reduce the cost of III-V photovoltaics (PV). We spin-coat nanoparticle suspensions onto GaAs thin-film device stacks. The suspensions dry in seconds, forming crack networks that we use as templates through which to electroplate the solar cells' front metal grids. For the first time, we show that heating the crack template allows it to flow and refill cracks, which decreases crack footprint and improves final grid transmittance. We demonstrate 24.7%-efficient single-junction GaAs solar cells using vacuum-free CFL grids. These devices are only 1.7% (absolute) less efficient than the baseline grids patterned by photolithography with the loss mostly resulting from the reduced transparency of the CFL pattern. Additional optimization could decrease this difference. Initial cost modeling suggests that CFL is more scalable than photolithography: In particular, CFL's lower materials and equipment costs could greatly reduce the levelized cost of electricity of III-V PV at scale, a potential step toward terrestrial deployment.
Keywords: electroplating; gallium arsenide; lithography; photovoltaics; solar cell.