Optimizing BCPNN Learning Rule for Memory Access

Yu Yang; Dimitrios Stathis; Rodolfo Jordão; Ahmed Hemani; Anders Lansner

doi:10.3389/fnins.2020.00878

Optimizing BCPNN Learning Rule for Memory Access

Front Neurosci. 2020 Aug 31:14:878. doi: 10.3389/fnins.2020.00878. eCollection 2020.

Authors

Yu Yang¹, Dimitrios Stathis¹, Rodolfo Jordão¹, Ahmed Hemani¹, Anders Lansner^{2

3}

Affiliations

¹ Division of Electronics and Embedded Systems, School of Electrical Engineering and Computer Science, KTH Royal Institute of Technology, Stockholm, Sweden.
² Division of Computational Science and Technology, School of Electrical Engineering and Computer Science, KTH Royal Institute of Technology, Stockholm, Sweden.
³ Department of Mathematics, Stockholm University, Stockholm, Sweden.

Abstract

Simulation of large scale biologically plausible spiking neural networks, e.g., Bayesian Confidence Propagation Neural Network (BCPNN), usually requires high-performance supercomputers with dedicated accelerators, such as GPUs, FPGAs, or even Application-Specific Integrated Circuits (ASICs). Almost all of these computers are based on the von Neumann architecture that separates storage and computation. In all these solutions, memory access is the dominant cost even for highly customized computation and memory architecture, such as ASICs. In this paper, we propose an optimization technique that can make the BCPNN simulation memory access friendly by avoiding a dual-access pattern. The BCPNN synaptic traces and weights are organized as matrices accessed both row-wise and column-wise. Accessing data stored in DRAM with a dual-access pattern is extremely expensive. A post-synaptic history buffer and an approximation function thus are introduced to eliminate the troublesome column update. The error analysis combining theoretical analysis and experiments suggests that the probability of introducing intolerable errors by such optimization can be bounded to a very small number, which makes it almost negligible. Derivation and validation of such a bound is the core contribution of this paper. Experiments on a GPU platform shows that compared to the previously reported baseline simulation strategy, the proposed optimization technique reduces the storage requirement by 33%, the global memory access demand by more than 27% and DRAM access rate by more than 5%; the latency of updating synaptic traces decreases by roughly 50%. Compared with the other similar optimization technique reported in the literature, our method clearly shows considerably better results. Although the BCPNN is used as the targeted neural network model, the proposed optimization method can be applied to other artificial neural network models based on a Hebbian learning rule.

Keywords: Bayesian Confidence Propagation Neural Network (BCPNN); DRAM; Hebbian learning; cache; digital neuromorphic hardware; memory optimization; neuromorphic computing; spiking neural networks.