This paper reports on the application of the Walsh-Hadamard transform (WHT) for data compression in brain-machine/brain-computer interfaces. Using the proposed technique, the amount of the neural data transmitted off the implant is compressed by a factor of at least 63 at the expense of as low as 4.66% RMS error between the signal reconstructed on the external host and the original neural signal on the implant side. Based on the proposed idea, a 128-channel WHT processor was designed in a 0.18- μm CMOS process occupying 1.64 mm(2) of silicon area. The circuit consumes 81 μW (0.63 μW per channel) from a 1.8-V power supply at 250 kHz. A prototype of the proposed processor was implemented and successfully tested using prerecorded neural signals.